How many types of isolation cells are there?

In previous post, we discussed why isolation cells are required in low power design. Let’s look at the types of isolation cells available in low power design.

  1. Isolation cell with clamp_value 1: In isolation mode, this cell drives 1 to its downstream logic. In normal mode, it acts as a buffer. This is similar to OR gate.
  2. Isolation cell with clamp_value 0: In isolation mode, this cell drives 0 to its downstream logic. In normal mode, it acts as a buffer. This is similar to AND gate.
  3. Latch type Isolation cell: In isolation mode, this cell will keep the latched value and drive its downstream logic. In normal mode it acts as a buffer. This is similar to Latch.
  4. Enable Level Shifter cell: This type of Isolation cells can perform both level-shifting and isolation functions. It is used where a signal crosses from one power domain to another, where the two voltage levels are different and the first domain can be powered down.

Why is isolation cell required in power aware design?

Two power domains interact if one contains the driver and the other contains the load. If the driving logic is powered down, the input to the receiving logic may float between 1 or 0. This can cause significant current to flow through the receiving logic, and the circuit may be damaged. In addition, an undriven input can also cause functional problems since it may float to an undefined value.

To avoid this problem, isolation cells shall be inserted between power domains to ensure that, input to receiving logic stays at a deterministic value. Isolation may be inserted for an input or for an output of the power domain. An isolation cell operates in two modes: normal mode, in which it acts like a buffer, and isolation mode, in which it clamps its output to a defined value. An isolation enable signal determines the operational mode of an isolation cell at any given time.

To avoid async timing arc from one power domain to the other, the transition between normal mode and isolation mode needs to be synchronous. Usually, in chip level, a power management module will activate / de-active isolation cells synchronously.

In next post, we will discuss the types of isolation cells used in power aware design.