1. Architectural Design and Prototype

1.1. Computer Architecture

• • How Computers Work?
  • CPU Pipeline
    • What does MIPS 5-stage pipeline looks like?
    • Hazards and solutions: a case study using MIPS 5-stage pipeline
    • How to implement hardware based branch predictions?
    • Can we arbitrarily increase the CPU pipeline depth?
  • CPU Out-of-order Scheduling
    • How does Tomasulo’s Algorithm work?
    • What are data dependencies through memory in Tomasulo’s Algorithm?
    • How to handle data dependencies through memory?
    • How to implement hardware-based speculation in Tomasulo’s Algorithm to minimize control hazards?
  • Precise Interrupt Implementation
    • What is precise interrupt? What is imprecise interrupt?
    • How to implement precise interrupt?
  • Virtual Memory
    • Virtual Memory
  • Cache
    • Why do we need cache?
    • What are cache conflicts?
    • Why is there no possible performance improvement with cache upsizing?
    • What are read / write / replacement policies in cache?
    • How to measure the cache performance?
    • What are the types of caches based on index and tag bits?
  • Cache Coherency
    • What are NUMA / UMA architectures?
    • What is cache coherency? How to enforce cache coherency?
    • Can you show the state transition for snoop-based scheme using MSI protocol?
    • What are MESI / MEOSI / MEOFSI protocols?
    • How to implement a home directory for MESI protocol?

1.2. Graphics Processing Unit (GPU)

• • How GPU works?
  • Define multicore microprocessor and shared memory multiprocessor (SMP)
  • What are SISD, MIMD, SPMD, and Vector?
  • What is Graphics GPU Rendering Pipeline?
  • What is a shader?
  • What is the difference between Unified and non-unified shader architectures?
  • How to optimize for GPU / Graphics workload performance?
  • What is Tile-Based Rendering Deferred Rendering (TBRD)?
  • What is Vertex Processing (Tiler)?
  • What is On-Chip Buffer used for?
  • What is Per-Tile Rasterization (Renderer)?

1.3. FPGA

• • What is FPGA and FPGA Programming?
  • Tell me about the FPGAs you are using?
  • What is FPGA Design Process?
  • Tell us about the different performance characterization criterion between RTL design and HLS design 

1.4. IO Subsystem

• • PCIe
  • UART
  • SPI
  • I2C
  • USB
  • Ethernet

1.5. Memory Ordering Model

1.6. Common System Bus

• • AXI/AHB/APB