In previous post, we talked about the concepts of OCV, AOCV and POCV. In this post, we will use an example to further illustrate how to calculate timing slack using OCV.

## An Example

Let’s assume OCV will derate 10% for clock cells, and 20% for data path. An reg-to-reg path along with delay values is shown in the diagram below. ## Setup Timing Slack with OCV

Let’s first consider the case without OCV.

Launch clock path delay = 0.1 + 0.1 = 0.2ns
Capture clock path delay = 0.1 + 0.1 + 0.1 = 0.3ns
Clock skew δ = capture clock path delay – launch clock path delay = 0.1ns

Recall setup timing constraint:

tpcq + tpd + tsetup = 0.2 + 0.4 + 0.1 = 0.7ns < Tc + δ = 1 + 0.1 = 1.1ns

Thus setup timing constraint is met, and the setup time slack is 1.1 – 0.7 = 0.4ns.

To take OCV into account, for setup timing, both launch clock path and data path will be derated with a value larger than 1, capture clock path will be derated with a value less than 1. Therefore,

Launch clock path delay = (0.1 + 0.1) x (1 + 10%) = 0.22ns
Capture clock path delay = (0.1 + 0.1 + 0.1) x (1 – 10%) = 0.27ns
Clock skew δ = capture clock path delay – launch clock path delay = 0.27 – 0.22 = 0.05ns

Observed that clock skew becomes smaller, setup time closure may be more difficult.

Now the setup timing constraint becomes:

tpcq + tpd + tsetup = (0.2 + 0.4) x (1 + 20%) + 0.1 = 0.82ns < Tc + δ = 1 + 0.05 = 1.05ns

Thus setup timing constraint with OCV is still met, and the setup time slack is 1.05ns – 0.82ns = 0.23ns, which is also smaller than before, meaning extra timing margin is added.

## Hold Timing Slack with OCV

Again, let’s first consider the case without OCV.

Launch clock path delay = 0.1 + 0.1 = 0.2ns
Capture clock path delay = 0.1 + 0.1 + 0.1 = 0.3ns
Clock skew δ = capture clock path delay – launch clock path delay = 0.1ns

Recall hold timing constraint:

tccq + tcd = 0.2 + 0.2 = 0.4ns > thold + δ = 0.1 + 0.1 = 0.2ns

Thus hold timing constraint is met, and the hold time slack is 0.4 – 0.2 = 0.2ns.

To take OCV into account, for hold time, both launch clock and data path will be derated with a value less than 1, capture clock path will be derated with a value larger than 1. Therefore,

Launch clock path delay = (0.1 + 0.1) x (1 – 10%) = 0.18ns
Capture clock path delay = (0.1 + 0.1 + 0.1) x (1 + 10%) = 0.33ns
Clock skew δ = capture clock path delay – launch clock path delay = 0.33 – 0.18 = 0.15ns

Observed that clock skew becomes larger, hold time closure may be harder.

Now the hold timing constraint becomes:

tccq + tcd = (0.2 + 0.2) x (1 – 20%) = 0.32ns > thold + δ = 0.1 + 0.15 = 0.25ns

Thus hold timing constraint with OCV still meets, and hold time slack is 0.32 – 0.25 = 0.07ns, which is also smaller than before. This means OCV adds extra timing margin.

## Conclusion

In this post, we use an example to explain how to calculate timing slack using OCV. The table below shows how we should derate the path delay in different scenarios:

 Launch Clock Path Data Path Capture Clock Path Setup Time Derate > 1 Derate > 1 Derate < 1 Hold Time Derate < 1 Derate < 1 Derate > 1

We recommend interviewees to fully digest the example and the table above. In next post, we will look at a very interesting corner case, introduced by derating.