Design a parameterized fix-point multiplier with assignable inputs and outputs bitwidth:

Input 1 – Integer Bits: WI1, Fractional Bits: WF1

Input 2 – Integer Bits: WI2, Fractional Bits: WF2

output – Integer Bits: WIO, Fractional Bits: WFO

Modern digital signal processors (DSPs) and microprocessors may involve high-precision digitized representation of real values. No finite number system can represent any real value. A sequence of n bits in a register can represent an integer and/or a fractional number. Any real value could be separated into an integer part and a fractional part. The delimitation of the integer part and the fractional part is called the radix point. There are two systems that can be used to represent a subset of real numbers: fixed-point format and floating-point format. In hardware implementation of the fixed-point format, the radix point is implied in a pre-determined fixed position. The wordlength and the position of the radix point are two main attributes of the fixed-point format. The n bits are separated into two parts: i bits for the integer part and f bits are used for the fractional part.

Fixed-point format

Design

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