Skip to content
Chipress Academy

Chipress Academy

LeetCode for Hardware Engineering, ASIC/FPGA/VLSI Digital Design and Verification Engineer

  • Welcome
  • Blog
    • Interview Questions
      • 1. Architectural Design and Prototype
      • 2. Micro-architecture Design
      • 3. Design Verification
      • 4. Integration and Synthesis
      • 5. Physical Design
      • 6. Tape-out and Silicon Debug
    • Coding Questions
    • Projects
    • Discussion Forum
  • About
  • Contact
Posted on 2019-04-232019-05-25

Design a parameterized fix-point adder

by Chipress.In Design Verification Engineer, FPGA Design Engineer, IBM, IC Design Engineer, Intel, Marvell, Nvidia, Qualcomm, Synopsys, Xilinx.1 Comment on Design a parameterized fix-point adder